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About the SHARC* family

Books

Comment from Analog

Date:         19970130
From:         kevin.looby@analog.com
To:           ganswijk@xs4all.nl
Subject:      Analog Devices SHARC*

I suggest that you may wish to add the Analog Devices
SHARC* Floating Point DSP* to your list of chips known primarily by name.
It is becoming very popular in the DSP* arena.  You can lift a description off
of the Web (www.analog.com). Or, if you wish, I have enclosed a brief overview.

SHARC* DSP*'s from Analog Devices. SHARC* stands for Super HArvard
Architecture Computer. The SHARC* is a 40 MIPS Floating Point DSP*
with a 25nS instruction rate. The processor features a 120 MFLOPS* peak
instruction rate (80 MFLOPS* sustained). The base part numbers in the family are
ADSP-21060 and ADSP-21062. The 21060 includes 4Mbit of on board SRAM*
arranged in two blocks of 128K words (x 32) of data memory and 80K words
(x 48) of program memory (or any combination thereof)
and the 21062 includes 2 MBit of onboard SRAM*
arranged in 64K words (x 32) of data memory and 40K words (x 48) of program
memory (or any combination thereof).
Visit the ADI Web Site at www.analog.com/ or EMail cpd_support@analog.com
for more info.

See also