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Zilog's Z80 8-Bit Microprocessor

Description

The Z80 microprocessor is an 8-bit CPU* with a 16-bit address bus capable of direct access of 64k of memory space. It has a language of 252 root instructions and with the reserved 4 bytes as prefixes, acceses an additional 308 instructions. The Z80 was modeled after the 8080 and contains the 78 - 8080 opcodes as a subset to it's language.

Programming features include an accumulator and six eight bit registers that can be paired as 3-16 bit registers. In addition to the general registers, a stack-pointer, program-counter, and two index (memory pointers) registers are provided. While not in the same leauge as the 80486 or 68000 series, the Z80 is extremely useful for low cost control applications. One of the more useful features of the Z80 is the built-in refresh circuitry for ease of design with DRAMs.

The Z80 comes in a 40 pin DIP package. It has been manufactured in A, B, and C models, differing only in maximum clock speed. It also has been manufactured as a stand-alone microcontroler with various configurations of on-chip RAM* and EPROM*.

Other Device Numbers

D780C (NEC)

Pin-Out and Signal Description

Pin #	Signal (active high unless noted)	comment
1	A11
2	A12
3	A13	Address bus
4	A14
5	A15
6	CLK	clock, rising edge trig
7	D4
8	D3
9	D5	Data bus
10	D6
11	+5V
12	D2
13	D7
14	D0
15	D1
16	INT	Interupt Request
17	NMI	Non-maskable Interupt Request
18	HALT	Active low
19	MREQ	Memory Request, active low
20	IORQ	I/O Request, active low
21	RD	Read, active low
22	WR	Write, active low
23	BUSAK	Bus Request Acknowloegmnet, active low
24	WAIT
25	BUSRQ	Bus Request
26	RESET
27	MI	Maskable interupt, active low
28	REFSH	Refresh timing, active low
29	GND*
30	A0
31	A1
32	A2
33	A3
34	A4
35	A5
36	A6
37	A7
38	A8
39	A9
40	A10

Device Specifications

Max. Clock Speed	Z80 - 2.5MHz, Z80A - 4MHz
Power Requirements	Z80 - 60mA, Z80A - 90mA
Operating Temp	0 - 70 deg C.
Min. Instruction time	1uS (4MHz)
Max. Instruction time	5.75uS (4MHz)
No. of Instructions	158 (78 instructions of 8080 are a subset)
Internal Registers	14
Stack	RAM*

Author

This information was compiled by Robert Wenzlaff with small corrections by me.

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